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RFIC Engineer


Description:
Extensive experience in the design, verification and
test of high frequency blocks such as LNA, Mixer,
VCO and PLL.
Experience in the design methodology of state of the art low power CMOS technology.
Knowledge of semiconductor device physics to the required level.
Familiarity with RF/Analog laboratory equipment.
Knowledge of Cadence design tools.
A minimum of 5 years experience.

Desired
MSEE or PhD with emphasis in RF field.



Primary Skills: Low Power CMOS RFIC design

Rate: DOE

Job Type: Permanent

NumberOfOpenings: 1

Location: San Diego